arm: tegra: Fix the CPU complex reset masks

The CPU complex reset masks are not matching with the datasheet for
the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20
and T30 the register consist of groups of 4 bits, with one bit for
each CPU core. On T20 the 2 high bits of each group are always stubbed
as there is only 2 cores.

Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

ARM: tegra: Add the Tamonten™ NG Evaluation Carrier board

Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.

Signed-off-by: Alban Bedel <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

i2c: tegra: Add the fifth bus on SoC with more than 4 buses

Create the i2c adapter object for the fifth bus on SoC with more than
4 buses. This allow using all the bus available on T30.

Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

ARM: tegra: support SKU b1 of Tegra30

Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.

Signed-off-by: Alban Bedel <[email protected]>
Reviewed-by: Julian Scheel <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

ARM: config: USB: Tegra30/114: Fix EHCI timeout issue on "bootp"

Fix the timeout issue after running "bootp" command in u-boot
console. For example you see "EHCI timed out on TD- token=0x...".
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10
after a controller reset and before RUN bit is set
(per technical reference manual).

Signed-off-by: Jim Lin <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

tegra: allow build to succeed with SPL disabled

u-boot-dtb-tegra.bin and u-boot-nodtb-tegra.bin binaries
are generated only if the SPL build is enabled as they have
dependency on SPL build

Signed-off-by: Vidya Sagar <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

Change maintainer for Avionic Design boards

I no longer work for Avionic Design and don't have access to hardware,
so I'll pass on maintainership to Alban.

Acked-by: Alban Bedel <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

Tegra114: Do not program CPCON field for PLLX

PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.

Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

Tegra114: Fix PLLX M, N, P init settings

The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.

Signed-off-by: Jimmy Zhang <[email protected]>
Reviewed-by: Tom Warren <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

ARM: OMAP5: clocks: Update MPU settings for OPP_NOM

As per the latest 0.6 version of DM for OMAP5430 ES2.0,
MPU_GCLK is given as 1000MHz. In order to achieve this DPLL_MPU
should be locked at 2000MHz. Fixing the same and cleaning the
previously used dpll values.

Reported-by: Nishanth Menon <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>

ARM: DRA7xx: Change clk divider setting

Commit "armv7: hw_data: change clock divider setting"
updates the setting for m6 divider for 20MHz sys_clk frequency.
But missed to update for other sys_clk frequencies. Doing the same.

Reported-by: Rajendran, Vinothkumar <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>

arm: omap: cm_t35: update config file

This patch makes the following updates to the cm_t35 config file:
- Replace "ttyS" in default environment kernel bootargs with the new "ttyO"
  notation.
- Remove "omapfb.debug=y" from default environment kernel bootargs.
- Define a minimal power-on delay for USB hub ports so that slow-to-power-on USB
  sticks will have enough time to become responsive.
- Add support for bootz command
- ulpi_reset is not necessary and always fails with the following error message:
  "ULPI: ulpi_reset: failed writing reset bit"
  So, remove it.

Cc: Tom Rini <[email protected]>
Signed-off-by: Nikita Kiryanov <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
Acked-by: Stefan Roese <[email protected]>

am3517_evm: activate Ethernet PHY

Pin 30 is connected to PHY's RESET# signal, so it must be
put to high. Otherwise PHY won't be found via MDIO interface.

Signed-off-by: Yegor Yefremov <[email protected]>

am335x, siemens boards: adapt default environment setting

commit 16297cfb2a20c9d89834cd9e31edac5184a777a1
Author: Mateusz Zalega <[email protected]>
Date:   Fri Oct 4 19:22:26 2013 +0200

    usb: new board-specific USB init interface

introduced a new parameter to the dfu command. Adapt the default environment
for the siemens boards.

Signed-off-by: Heiko Schocher <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Mateusz Zalega <[email protected]>

arm: omap: abb: add missing include

ABB code uses LDELAY but does not include the header that provides its
definition.

Include the header.

Cc: Tom Rini <[email protected]>
Signed-off-by: Nikita Kiryanov <[email protected]>
Acked-by: Nishanth Menon <[email protected]>

arm: am437: Fix offset for USB registers

Fix the offset for the USB clock registers

Signed-off-by: Dan Murphy <[email protected]>

am335x_evm: Consolidate DFU environment parts into the DFU part of the file

To make managing the environment easier, add DFUARGS to
CONFIG_EXTRA_ENV_SETTINGS.  Then we set DFUARGS down in the DFU part of
the file, and include (or not) the NAND part, based on if NAND is set.

Signed-off-by: Tom Rini <[email protected]>

arm: omap3: Add SPL support to cm_t35

Add SPL U-Boot support to replace x-loader on the Compulab cm_t35
board. Currently only the 256MiB SDRAM board versions are supported.

Tested by booting via MMC and NAND.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Acked-by: Igor Grinberg <[email protected]>

arm: omap3: Add HEAD acoustics (HA) board variant omap3_ha to tao3530

The Head acoustics (HA) baseboard used the Technexion TAO3530 SOM
and has only some minor differences to the Technexion Thunder baseboard.
This patch adds support for this HA baseboard / TAO3530 as the "omap3_ha"
build target.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Tapani Utriainen <[email protected]>
Cc: Thorsten Eisbein <[email protected]>
Cc: Tom Rini <[email protected]>

arm: omap3: Add board revision output to tao3530

Signed-off-by: Stefan Roese <[email protected]>
Cc: Tapani Utriainen <[email protected]>
Cc: Thorsten Eisbein <[email protected]>
Cc: Tom Rini <[email protected]>

arm: omap3: Remove bootargs mem_size handling

The memory size is autodetected and is passed to the Linux kernel
either via ATAGs or device-tree (dtb). So there is no need to
pass it via the bootargs.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Tapani Utriainen <[email protected]>
Cc: Thorsten Eisbein <[email protected]>
Cc: Tom Rini <[email protected]>

arm: omap3: Add SPL support to tao3530

Add SPL support for the Technexion TAO3530 SOM to replace
x-loader. Tested with the Thunder baseboard. Currently this is
only tested with the TAO3530 SOM revision (Ax/Bx).

Tested by booting via MMC and NAND.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Tapani Utriainen <[email protected]>
Cc: Thorsten Eisbein <[email protected]>
Cc: Tom Rini <[email protected]>

arm, omap3: Add support for TechNexion modules

Add support for TechNexion TAO3530 SoM

This patch has been posted quite a long time ago. I ported it to
the latest mainline U-Boot version. With some additional cleanup
and enhancements.

Signed-off-by: Tapani Utriainen <[email protected]>
CC: Sandeep Paulraj <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
Cc: Thorsten Eisbein <[email protected]>
Cc: Tom Rini <[email protected]>

ARM: OMAP4: Move TEXT_BASE down to non-HS limit

With the current scenario SPL size is being overlapped with the public
stack and not allowing any OMAP4 device to boot. So the suggestion came
up was to move the TEXT_BASE down to non-HS limit. Fixing the same and
also moving the SRAM_SCRATCH_SPACE_ADDR up to the end of image
downloadable area.
Discussion on this can be seen here:
https://www.mail-archive.com/[email protected]/msg127147.html

Tested on OMAP4460 PANDA.

Reported-by: Chao Xu <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>

am33xx: Enable D-CACHE on !CONFIG_SYS_DCACHE_OFF

Test on Beaglebone white over cpsw, usb ether and SD card (read and
write), performance increased, crc32 of data matches.

Signed-off-by: Tom Rini <[email protected]>

ARM: fix the standalone programs

The standalone programs do not use the api calls, but rely
directly on u-boot variable gd->jt for the jump table. Commit
fe1378a - "ARM: use r9 for gd" changed the register holding
the address of gd, but the assembly code in the standalone
examples was not updated accordingly. This broke the programs
on ARM relying on the jumptable in the v2013.10 release.
This patch unbricks them by using the correct register.

Cc: Michal Simek <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Signed-off-by: Jeroen Hofstee <[email protected]>

Revert "ARM: move interrupt_init to before relocation"

Revert commit 0f5141e9 which causes boards starting in
FLASH to try and write to a FLASH location.

Signed-off-by: Albert ARIBAUD <[email protected]>

Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
board/samsung/trats2/trats2.c
include/configs/exynos5250-dt.h

Signed-off-by: Tom Rini <[email protected]>

Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard

Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds

Merge branch 'spi' of git://git.denx.de/u-boot-x86

Merge branch 'master' of git://git.denx.de/u-boot-mmc

Merge branch 'master' of git://git.denx.de/u-boot-i2c

vexpress: use correct timer address on extended memory map systems

Signed-off-by: Ian Campbell <[email protected]>
Cc: [email protected]

serial: zynq: Remove unused #defines

Signed-off-by: Soren Brinkmann <[email protected]>
Signed-off-by: Michal Simek <[email protected]>

sandbox: spi: Enable new spi/sf layers

We want to test SPI flash code in the sandbox, so enable the new drivers and
the 'sf test' command.

This command is used to validate the sandbox SPI / SPI flash implementation,
so enable it.

Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Simon Glass <[email protected]>

sandbox: spi: Add new SPI flash driver

This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write.  Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.

[email protected] added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.

Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Simon Glass <[email protected]>

sandbox: spi: Add SPI emulation bus

This adds a SPI framework for people to hook up simulated SPI clients.

Signed-off-by: Mike Frysinger <[email protected]>
Signed-off-by: Simon Glass <[email protected]>

spi: Add device tree binding for SPI bus

This was obtained from Linux 3.12 commit 5e01dc7b26.

Signed-off-by: Simon Glass <[email protected]>

spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT node

This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.

Signed-off-by: Simon Glass <[email protected]>

sandbox: Rename sb_cmdline_option to sandbox_cmdline_option

The new name is longer but more clearly related to sandbox.

This is in a separate patch within the same series since some comments on the
SPI series rely on it.

Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Hung-ying Tyan <[email protected]>

arm: at91: support for the Calao USB-A9263 board (based on AT91SAM9263)

Add support for USB-A9263 board manufactured by Calao Systems
(http://www.calao-systems.com/).
Code is based on old U-Boot sources (2010.09) released by Calao.

Signed-off-by: Mateusz Kulikowski <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>

arm, at91: add siemens corvus board

enable support for the siemens AT91SAM9G20 based board corvus.

Signed-off-by: Boris Schmidt <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>

arm, at91: add Siemens board taurus and axm

enable support for the siemens AT91SAM9G20 based boards taurus
and axm.

Signed-off-by: Roger Meier <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>

at91: switch coloured LED to gpio API

Signed-off-by: Andreas Bießmann <[email protected]>

at91: nand: switch atmel_nand to generic GPIO API

Signed-off-by: Andreas Bießmann <[email protected]>
Acked-by: Jens Scharsig (BuS Elektronik)<[email protected]>
Tested-by: Jens Scharsig (BuS Elektronik)<[email protected]>
Acked-by: Scott Wood <[email protected]>

at91: redefine legacy GPIO PIN_BASE

In order to get the very same value for legacy pin definitions and new gpio
definitions set the legacy PIN_BASE to 0.

Signed-off-by: Andreas Bießmann <[email protected]>

at91: add new gpio pin definitions

This patch define new names for GPIO pins on at91 devices. Follow up patches
will convert the whole infrastructure to use these new definitions.

Signed-off-by: Andreas Bießmann <[email protected]>
Tested-by: Bo Shen <[email protected]>

mmc: add Faraday FTSDC021 SDHCI controller support

Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.

However this driver is only verified with SD memory cards.

Signed-off-by: Kuo-Jung Su <[email protected]>
Acked-by: Pantelis Antoniou <[email protected]>
CC: Andy Fleming <[email protected]>

powerpc: mmc: Add corenet devices support in esdhc spl

Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <[email protected]>
Acked-by: Pantelis Antoniou <[email protected]>

mmc/dwmmc: modify FIFO threshold only if value explicitly set

If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.

This implementation allows:
 * escape unclear and recursive calculations that are currently in use
 * use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it

Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Mischa Jonker <[email protected]>
Cc: Alim Akhtar <[email protected]>
Cc: Rajeshwari Shinde <[email protected]>
Cc: Jaehoon Chung <[email protected]>
Cc: Amar <[email protected]>
Cc: Kyungmin Park <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Pantelis Antoniou <[email protected]>
Cc: Andy Fleming <[email protected]>
Acked-by: Jaehoon Chung <[email protected]>
Acked-by: Pantelis Antoniou <[email protected]>

mmc: dw_mmc: remove the exynos specific code in dw-mmc.c

dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.

Signed-off-by: Jaehoon Chung <[email protected]>
Acked-by: Alexey Brodkin <[email protected]>
Acked-by: Pantelis Antoniou <[email protected]>
Acked-by: Minkyu Kang <[email protected]>

arm: keep all sections in ELF file

Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.

Signed-off-by: Albert ARIBAUD <[email protected]>
Reviewed-by: Benoît Thébaudeau <[email protected]>

ARM: align MVBAR on 32 byte boundary

The lower 5 bit of MVBAR is UNK/SBZP.
So, Monitor Vector Base Address must be 32-byte aligned.
On the other hand, the secure monitor handler does not need
32-byte alignment.

This commit moves ".algin 5" directive to the correct place.

Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Andre Przywara <[email protected]>
Acked-by: Andre Przywara <[email protected]>

Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

Merge branch 'master' of git://git.denx.de/u-boot-blackfin

AM3517 EVM: Enable ethernet

Signed-off-by: Tom Rini <[email protected]>

omap4_panda: Don't use ulpi_reset

Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"

It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.

Reported-by: Tomi Valkeinen <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>

omap3_beagle: Don't use ulpi_reset

Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"

It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.

Reported-by: Tomi Valkeinen <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>

usb: ehci-omap: Reset the USB Host OMAP module

In commit bb1f327 we removed the UHH reset to fix NFS root (over usb
ethernet) problems with Beagleboard (3530 ES1.0). However, this
seems to cause USB detection problems for Pandaboard, about (3/8).

On further investigation, it seems that doing the UHH reset is not
the cause of the original Beagleboard problem, but in the way the reset
was done.

This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based
on the UHH_REVISION register. This should fix the Beagleboard NFS
problem as well as the Pandaboard USB detection problem.

Reported-by: Tomi Valkeinen <[email protected]>
CC: Stefan Roese <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>

arm: omap3: Enable clocks for peripherals only if they are used

This patch change the per_clocks_enable() function used in OMAP3
code to enable peripherals clocks. Only required clock should be
activated. So if the board use the uart(x) as a console we need
to activate it. The Board's config should include define to enable
every subsystem that the board use. For a complete list
of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER
should be checked.
Right now the bootloader can enable and disable clocks for:
uart(x) using CONFIG_SYS_NS16550
gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 }
i2c bus using CONFIG_DRIVER_OMAP34XX_I2C.

Not required gptimer(x) and mcbsp(x) for booting are disabled by default and
are not supported by any define.
Their activation need to included in the per_clocks_enable if the
peripheral is included. Not booting board should enable the peripheral
clock connected to their driver

Signed-off-by: Michael Trimarchi <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Tom Rini <[email protected]>
Acked-by: Igor Grinberg <[email protected]>

arm: arndale: disable spi boot

arndale board is booted from mmc

Signed-off-by: Minkyu Kang <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Inderpal Singh <[email protected]>

arm: exynos: adds ifdef for spi boot

This patch fix following errors and warnings

spl_boot.c: In function 'exynos_spi_copy':
spl_boot.c:111:49: error: 'CONFIG_ENV_SPI_BASE' undeclared (first use in this function)
spl_boot.c:111:49: note: each undeclared identifier is reported only once for each function it appears in
spl_boot.c:142:2: error: 'SPI_FLASH_UBOOT_POS' undeclared (first use in this function)
spl_boot.c: In function 'copy_uboot_to_ram':
spl_boot.c:189:28: warning: unused variable 'param' [-Wunused-variable]
spl_boot.c: At top level:
spl_boot.c:107:13: warning: 'exynos_spi_copy' defined but not used [-Wunused-function]

Signed-off-by: Minkyu Kang <[email protected]>
Cc: Albert ARIBAUD <[email protected]>

Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'

blackfin: Do not generate unused header bootrom-asm-offsets.h

Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>

spi: bfin_spi6xx: Remove unnecessary test for bus and pins[bus]

For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.

Signed-off-by: Axel Lin <[email protected]>
Acked-by: Scott Jiang <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>

spi: bfin_spi: Remove unnecessary test for bus and pins[bus]

For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.

Signed-off-by: Axel Lin <[email protected]>
Acked-by: Scott Jiang <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>

blackfin: soft-i2c: No need to define blackfin specific soft i2c operations

Use default GPIO operations.

Signed-off-by: Sonic Zhang <[email protected]>
Acked-by: Heiko Schocher <[email protected]>

blackfin: Add missing macro CONFIG_BFIN_SERIAL

Signed-off-by: Sonic Zhang <[email protected]>

blackfin: If none ADI_GPIOX macro is defined, use ADI_GPIO1 as default

Signed-off-by: Sonic Zhang <[email protected]>

blackfin: Use ADI_GPIO2 driver other than the default ADI_GPIO1

Signed-off-by: Sonic Zhang <[email protected]>

i2c: samsung: register i2c busses for Exynso5420 and Exynos5250

This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
on Exynos5420 and Exynos5250 and also adds support for init function
for hsi2c channels

Signed-off-by: Naveen Krishna Chatradhi <[email protected]>

arm: omap: i2c: don't zero cnt in i2c_write

Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to the following advisory which
apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as
OMAP4430 TRM:

Advisory:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow 0-byte data
transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause
undefined behavior.
Workaround(s):
No workaround. Do not use 0-byte data requests.

The writes in question are unnecessary from a functional point of view.
Most of them are done after I/O has finished, and the only one that preceds
I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before
actual data transmission takes place.

Therefore, remove all writes that zero the cnt register.

Cc: Heiko Schocher <[email protected]>
Cc: Thomas Petazzoni <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Lubomir Popov <[email protected]>
Cc: Enric Balletbo Serra <[email protected]>
Signed-off-by: Nikita Kiryanov <[email protected]>
Tested-by: Thomas Petazzoni <[email protected]>
Tested-by: Lubomir Popov <[email protected]>

cmd_eeprom: bug fix for i2c read/write

The local pointer of address (i.e., addr) only gets
referenced under SPI mode, and it won't be appropriate
to pass only 1-byte addr[1] to i2c_read/i2c_write while
CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 1.

1. In U-boot's I2C model, the address would be re-assembled
   to a byte string in MSB order inside I2C controller drivers.

2. The 'CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW' option which could
   be found at soft_i2c.c is always turned on in cmd_eeprom.c,
   the addr[0] always contains the device address with overflowed
   MSB address bits.

Signed-off-by: Kuo-Jung Su <[email protected]>
Cc: Alexey Brodkin <[email protected]>
Cc: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
cc: Peter Tyser <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Mischa Jonker <[email protected]>

i2c: fti2c010: serial out r/w address in MSB order

For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B),
the r/w address should be serial out in MSB order.

Signed-off-by: Kuo-Jung Su <[email protected]>
Cc: Heiko Schocher <[email protected]>

i2c: fti2c010: migrate to new i2c model

Replace the legacy i2c model with the new one.

Signed-off-by: Kuo-Jung Su <[email protected]>
Cc: Heiko Schocher <[email protected]>

i2c: fti2c010: cosmetic: coding style cleanup

Coding style cleanup

Signed-off-by: Kuo-Jung Su <[email protected]>
Cc: Heiko Schocher <[email protected]>

driver:i2c:s3c24x0: fix clock init for hsi2c

Fix clock value initialisation for Exynos other than Exynos5 for hsi2c.

Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Heiko Schocher <[email protected]>

driver:i2c:s3c24x0: adapt driver to new i2c

This patch adapts the s3c24x0 driver to the new i2c framework.
Config file is modified for all the boards that use the driver.

Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
CC: Minkyu Kang <[email protected]>
CC: Heiko Schocher <[email protected]>
CC: Inderpal Singh <[email protected]>
CC: David Müller <[email protected]>
CC: Chander Kashyap <[email protected]>
CC: Lukasz Majewski <[email protected]>
Tested-by: Naveen Krishna Chatradhi <[email protected]>
Reviewed-by: Naveen Krishna Chatradhi <[email protected]>

arm: exynos: remove the unused define.

These defines didn't use anywhere.

Signed-off-by: Jaehoon Chung <[email protected]>
Acked-by: Alexey Brodkin <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>

arm: exynos/goni: fix the return type for s5p_mmc_init

The "int" type is right.

Signed-off-by: Jaehoon Chung <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>

powerpc/mpc8349: Use generic mpc85xx DDR driver

MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use their own driver.

Signed-off-by: York Sun <[email protected]>

powerpc/t2080qds: undef CONFIG_FSL_DDR_INTERACTIVE

Usually CONFIG_FSL_DDR_INTERACTIVE feature is used for debug.
we would not enable this by default to save the limited space of u-boot.

This avoid following compiling error:
section .bootpg loaded at [00000000effff000,00000000effff577] overlap ssection
.data loaded at [00000000efff31b8,00000000f00010c7]
u-boot: section .bootpg lma 0xeffff000 adjusted to 0xf00010c8

Signed-off-by: Shengzhou Liu <[email protected]>
Acked-by: York Sun <[email protected]>

T4240: Address T4240/T4160 Rev2.0 DDR clock change

MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.

Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Acked-by: York Sun <[email protected]>

powerpc: spiflash:Add corenet devices support in eSPI SPL

Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <[email protected]>
Acked-by: York Sun <[email protected]>

powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROM

Currently, there is only one EEPROM on c29xpcie board which is AT24C1024.
We program the SPD data at beginning of the AT24C1024.But the AT24C1024
has a 16-bit sub-address mode. This patch is tomake it work when getting
SPD in a 16-bit sub-address EEPROM.

Signed-off-by: Po Liu <[email protected]>
Acked-by: York Sun <[email protected]>

powerpc/p1010rdb:modify the mtest start_address

In new board P1010RDB-PB, the interrupt vector table is at
the start of memory. So if the start_address needs to be set
a proper value.

Signed-off-by: Zhao Qiang <[email protected]>
Acked-by: York Sun <[email protected]>

powerpc/corenet: CPC1 speculation disable

In PBL RAMBOOT(SPI/SD/NAND boot) mode, CPC1 used as SRAM, should disable
CPC1 speculation and keep it till relocation. Otherwise, speculation
transactions will go to DDR controller, it will cause problem.

Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Acked-by: York Sun <[email protected]>

am335x: cpsw: optimize cpsw_recv to increase network performance

In 48ec5291, only TX path was optimized; this does the same also for RX
path. This results in huge increase of TFTP throughput on custom am3352
board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer
timeouts.

Signed-off-by: Vladimir Koutny <[email protected]>
Cc: Mugunthan V N <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Tom Rini <[email protected]>

pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAM

Signed-off-by: Hardik Patel <[email protected]>

davinci: fix Master Priority Registers location

MSTPRI0 (Master Priority 0 Register) sits at 0x01C14110 not at
0x01C14114

Signed-off-by: Viktar Palstsiuk <[email protected]>

arm: am335x: Add DT (FDT) support to Siemens boards

Enable FDT support for all Siemens AM335x boards. To support
newer Linux kernels with DT booting.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Roger Meier <[email protected]>
Cc: Lukas Stockmann <[email protected]>
Cc: Tom Rini <[email protected]>
Acked-by: Heiko Schocher<[email protected]>

am335x_evm: Update nandboot to use partitions and DT

Signed-off-by: Tom Rini <[email protected]>

arm: omap3: Add uart4 omap3 adddress

This patch add the OMAP34XX_UART4 memory address

Signed-off-by: Michael Trimarchi <[email protected]>

ARM: OMAP5+: Remove unnecessary EFUSE settings

Certain EFUSE settings were recommended for the first
four lots of OMAP5 ES1.0 silicon. These are not applicable
for OMAP5 ES2.0 and DRA7 silicon. So removing these EFUSE settings.

Reported-by: Griffis, Brad <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>

ARM: dra7_evm: Add SATA support

The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.

Signed-off-by: Roger Quadros <[email protected]>

ARM: DRA7xx: Add PRCM and Control information for SATA

Adds the necessary PRCM and Control register information for
SATA on DRA7xx.

Signed-off-by: Roger Quadros <[email protected]>

ARM: omap5_uevm: Add SATA support

The uevm has a SATA port. Inititialize the SATA controller.

Signed-off-by: Roger Quadros <[email protected]>

ARM: OMAP5: Add SATA platform glue

Add platform glue logic for the SATA controller.

Signed-off-by: Roger Quadros <[email protected]>

ARM: OMAP5: Add PRCM and Control information for SATA

Adds the necessary PRCM and Control register information for
SATA on OMAP5.

Signed-off-by: Roger Quadros <[email protected]>